Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 RST 5.5 TRAP INTR RST 7.5 RST 5.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed Both Ihe numbers are changed and their exponents are, made equal to -5 None of the numbers is changed .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed Both Ihe numbers are changed and their exponents are, made equal to -5 None of the numbers is changed .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In one’s complement 8 bit representation 11111111 represents -1 -0 1 +0 -1 -0 1 +0 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Mux Decoder Register Gate Mux Decoder Register Gate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XTHL & DAD H PCHL & DAD D XCHG & DAD B XCHG & DAD H XTHL & DAD H PCHL & DAD D XCHG & DAD B XCHG & DAD H ANSWER DOWNLOAD EXAMIANS APP
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