Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 RST 7.5 TRAP INTR RST 5.5 RST 7.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) only (I), (II) & (III) (I) only (II) & (III) (II) only (I), (II) & (III) (I) only (II) & (III) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as DMA bus Memory bus Control bus Address bus DMA bus Memory bus Control bus Address bus ANSWER DOWNLOAD EXAMIANS APP
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