Microprocessor In 8085 P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. Stack Pointer B-C PSW D-E Stack Pointer B-C PSW D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 sets zero and carry flags reset zero and parity flags reset carry and sign flags sets zero and sign flags sets zero and carry flags reset zero and parity flags reset carry and sign flags sets zero and sign flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is asserted R is negated, S is asserted R is negated, S is negated R is asserted, S is negated R is asserted, S is asserted R is negated, S is asserted R is negated, S is negated R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 4 K bytes 8 K bytes 10 K bytes 1 K bytes 4 K bytes 8 K bytes 10 K bytes 1 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is a valid integer constant? 125 + 3 127 127 127 125 + 3 127 127 127 ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS