Microprocessor The microprocessor issues ALE during first T-state of memory READ cycle only every machine cycle fetch cycle only memory WRITE cycle only memory READ cycle only every machine cycle fetch cycle only memory WRITE cycle only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Inintel 8085A microprocessor ALE signal is made high to Enable the data bus to be used as low order address bus To latch data D0-D7 from data bus To disable data bus To achieve all the functions listed above Enable the data bus to be used as low order address bus To latch data D0-D7 from data bus To disable data bus To achieve all the functions listed above ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) Execution Unit (EU) Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any mask able interrupt the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any mask able interrupt the microprocessor can be interrupted by a non-mask able interrupt ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many bytes in a zero memory page should be reserved for vectors used by RST instructions? 128. 16. 64. 32. 128. 16. 64. 32. ANSWER DOWNLOAD EXAMIANS APP
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