Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any mask able interrupt the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any mask able interrupt the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While STC instruction executes, only carry flag will be affected. no flags will be affected. all flags will be affected. only carry and zero flags will be affected. only carry flag will be affected. no flags will be affected. all flags will be affected. only carry and zero flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? Arithmetic and logic operations can be directly performed with the I/O data There can be maximum of 256 input devices and 256 output devices Devices have 8-bit address line Devices are accessed using IN and OUT instructions Arithmetic and logic operations can be directly performed with the I/O data There can be maximum of 256 input devices and 256 output devices Devices have 8-bit address line Devices are accessed using IN and OUT instructions ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The clock speed of 8085 is 1MHz. 3.2KHz. 3.2MHz. 1KHz. 1MHz. 3.2KHz. 3.2MHz. 1KHz. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T1 OP code fetch T3 OP code fetch T4 OP code fetch T2 OP code fetch T1 OP code fetch T3 OP code fetch T4 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 1000 H and 1001 H 0FFE H and 0FFF H 1000 H and 0FFF H 0FFF H and 0FFE H 1000 H and 1001 H 0FFE H and 0FFF H 1000 H and 0FFF H 0FFF H and 0FFE H ANSWER DOWNLOAD EXAMIANS APP
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