Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. D-E B-C Stack Pointer PSW D-E B-C Stack Pointer PSW ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack pointer register in a microprocessor holds the address of the top of the stack keeps the address of the next instruction to be fetched counts the number of programs being executing on the microprocessor counts the number of instructions being executing on the microprocessor holds the address of the top of the stack keeps the address of the next instruction to be fetched counts the number of programs being executing on the microprocessor counts the number of instructions being executing on the microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. INTR RST 5.5 RST 7 TRAP INTR RST 5.5 RST 7 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: Arithmetic Logic Unit (ALU) 1.Performs arithmetic operations 2.Performs comparisons. 3.Communicates with I/O devices 4.Keeps watch on the system Which of these statements are correct? 3 and 4 only 1, 2, 3 and 4 1, 2 and 3 1 and 2 only 3 and 4 only 1, 2, 3 and 4 1, 2 and 3 1 and 2 only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always set not affected affected indicating specific conditions always reset always set not affected affected indicating specific conditions always reset ANSWER DOWNLOAD EXAMIANS APP
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