Microprocessor
The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between

 T4 & T1
 T3 & T4
 T2 & T3
 T1 & T2

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Microprocessor
In 8085

P flag is reset when the result has even parity
P flag is set when the result has even parity
P flag is set when the result has odd parity
P flag is reset when the result has odd parity

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