Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T2 & T3 T3 & T4 T4 & T1 T1 & T2 T2 & T3 T3 & T4 T4 & T1 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the sign bit of mantissa is 0 and the exponent is increased from a positive to a more negative number the result is Either A or B depending on the actual number A larger floating point number A smaller floating point number A negative floating point number Either A or B depending on the actual number A larger floating point number A smaller floating point number A negative floating point number ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) & (III) (II) only (I), (II) & (III) (I) only (II) & (III) (II) only (I), (II) & (III) (I) only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The characteristics of RESET OUT signal is/are the signal is synchronized to the processor clock. indicates that µp is being reset. this signal can be used to reset other devices. all. the signal is synchronized to the processor clock. indicates that µp is being reset. this signal can be used to reset other devices. all. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum of how many devices can be connected simultaneously to the microprocessor via 8257 in DMA data transfer mode? 4 6 10 8 4 6 10 8 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The maximum number of seven segment displays that can be connected to 8279 is 18 12 16 8 18 12 16 8 ANSWER DOWNLOAD EXAMIANS APP
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