Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines status lines higher order address lines None of these lower order address lines status lines higher order address lines None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ‘Burst refresh’ in DRAM is also called Distributed refresh Hidden refresh None of these Concentrated refresh Distributed refresh Hidden refresh None of these Concentrated refresh ANSWER DOWNLOAD EXAMIANS APP
Microprocessor CALL instruction is a ______ instruction. 1 bytes 2 bytes 4 bytes 3 bytes 1 bytes 2 bytes 4 bytes 3 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. None of these Execution Unit (EU) Both ‘c’ and ‘d’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘c’ and ‘d’ Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted R is negated, S is negated R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted R is negated, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional A is false but R is true A is true but R is false Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A A is false but R is true A is true but R is false Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
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