Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following microprocessor has 16-bit data bus? 8085 Z-80 68000 6502 8085 Z-80 68000 6502 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always A memory read cycle An I/O read cycle A memory write cycle A fetch cycle A memory read cycle An I/O read cycle A memory write cycle A fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ‘Burst refresh’ in DRAM is also called Hidden refresh Concentrated refresh None of these Distributed refresh Hidden refresh Concentrated refresh None of these Distributed refresh ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 name/names of the 16 bit registers is/are none of these. program counter. stack pointer. both A and B. none of these. program counter. stack pointer. both A and B. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 INTR RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
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