Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is asserted, S is asserted R is negated, S is negated R is asserted, S is negated R is negated, S is asserted R is asserted, S is asserted R is negated, S is negated R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which memory has read operation, byte erase, byte write and chip erase? RAM Both B and C UVEPROM EEPROM RAM Both B and C UVEPROM EEPROM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor S0 and S1 pins are used for serial communication None of these acknowledging the interrupt indicating the processor’s status serial communication None of these acknowledging the interrupt indicating the processor’s status ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA is used between microprocessor and memory microprocessor and I/O memory and I/O none microprocessor and memory microprocessor and I/O memory and I/O none ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. Stack Pointer PSW D-E B-C Stack Pointer PSW D-E B-C ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS