Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 RST 6.5 TRAP both ‘a’ and ‘b’ RST 5.5 RST 6.5 TRAP both ‘a’ and ‘b’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T4 & T1 T1 & T2 T3 & T4 T2 & T3 T4 & T1 T1 & T2 T3 & T4 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: Arithmetic Logic Unit (ALU) 1.Performs arithmetic operations 2.Performs comparisons. 3.Communicates with I/O devices 4.Keeps watch on the system Which of these statements are correct? 1, 2, 3 and 4 1 and 2 only 1, 2 and 3 3 and 4 only 1, 2, 3 and 4 1 and 2 only 1, 2 and 3 3 and 4 only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PUSH B instruction in 8085 microprocessor causes registers B & C to be cleared the contents of registers B & C to be transferred in the stack and and the registers get cleared the contents of register B & C to be copied in the stack the contents of register B only to be copied in the stack registers B & C to be cleared the contents of registers B & C to be transferred in the stack and and the registers get cleared the contents of register B & C to be copied in the stack the contents of register B only to be copied in the stack ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many bytes in a zero memory page should be reserved for vectors used by RST instructions? 64. 32. 128. 16. 64. 32. 128. 16. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Output of the assembler in machine codes is referred to as Source program Object program Macroinstruction Symbolic addressing Source program Object program Macroinstruction Symbolic addressing ANSWER DOWNLOAD EXAMIANS APP
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