Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? both ‘a’ and ‘b’ TRAP RST 6.5 RST 5.5 both ‘a’ and ‘b’ TRAP RST 6.5 RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) same as the content of A7-A0 irrelevant all bits set (i.e. FFH) all bits reset (i.e. 00H) same as the content of A7-A0 irrelevant all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Register pair used to indicate memory D and E W and Z B and C H and L D and E W and Z B and C H and L ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T2 OP code fetch T3 OP code fetch T1 OP code fetch T4 OP code fetch T2 OP code fetch T3 OP code fetch T1 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a fixed AND array and a programmable OR array is called a PROM PAL PLA PLD PROM PAL PLA PLD ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 name/names of the 16 bit registers is/are none of these. program counter. both A and B. stack pointer. none of these. program counter. both A and B. stack pointer. ANSWER DOWNLOAD EXAMIANS APP
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