Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always set always reset not affected affected indicating specific conditions always set always reset not affected affected indicating specific conditions ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operations executed by two or more control units are referred as Micro-operations Multi-operations Bi control-operations Macro-operations Micro-operations Multi-operations Bi control-operations Macro-operations ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data bus of any microprocessor is always Unidirectional None Bi-directional Either unidirectional or bi-directional Unidirectional None Bi-directional Either unidirectional or bi-directional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a vector interrupt the branch address is assigned to a fixed location in memory. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is obtained from a register in the processor. the branch address is assigned to a fixed location in memory. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is obtained from a register in the processor. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP