Which of the following interrupt is both level and edge sensitive? TRAP RST 7.5 INTR RST 5.5 TRUE ANSWER : ? YOUR ANSWER : ?
Which one of the following ICs is used to interface keyboard and display? 8259 8251 8253 8279 TRUE ANSWER : ? YOUR ANSWER : ?
The timing difference between a slow memory and fast processor can be resolved if Processor is capable of waiting External buffer is used Either A or B Neither A nor B TRUE ANSWER : ? YOUR ANSWER : ?
How many 16-bit special purpose registers are present in 8085 microprocessor? 6 2 16 8 TRUE ANSWER : ? YOUR ANSWER : ?
Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated TRUE ANSWER : ? YOUR ANSWER : ?
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier] None of these Circuit A has the same number of gates as circuit B Circuit A has more gates than circuit B Circuit B has more gates than circuit A TRUE ANSWER : ? YOUR ANSWER : ?
The multiplexing of address bus and data buses is used in never multiplexed. all the microprocessors. depends on the internal architecture. none of these. TRUE ANSWER : ? YOUR ANSWER : ?
The 8085 microprocessor enters into bus idle machine cycle whenever INTR interrupt is recognized RST 7.5 is recognized None of these DAD RP instruction is executed TRUE ANSWER : ? YOUR ANSWER : ?
In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0000H 003CH 0034H 002CH TRUE ANSWER : ? YOUR ANSWER : ?