A gate is disabled when its disable input is at logic 0. The gate is AND NOR OR none of these TRUE ANSWER : ? YOUR ANSWER : ?
In an SR latch built from NOR gates, which condition is not allowed S=1, R=0 S=0, R=0 S=0, R=1 S=1, R=1 TRUE ANSWER : ? YOUR ANSWER : ?
When will be the output of an OR gate is LOW ? When any input is HIGH When all inputs are HIGH When any input is LOW When all input is LOW TRUE ANSWER : ? YOUR ANSWER : ?
A 32 × 10 ROM contains a decoder of size 32 × 10 32 × 32 10 × 32 5 × 32 TRUE ANSWER : ? YOUR ANSWER : ?
NOT gates are to be added to the inputs of which gate to convert it to a NOR gate? X-NOR NAND OR AND TRUE ANSWER : ? YOUR ANSWER : ?
The output of a NOR gate is high only when at least one input is low only when all the inputs are high only when at least one input is high only when all the inputs are low TRUE ANSWER : ? YOUR ANSWER : ?
Storage of 1 KB means the following number of bytes 1024 1064 1000 964 TRUE ANSWER : ? YOUR ANSWER : ?