Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 64 65536 256 512 64 65536 256 512 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. A is true but R is false. Both A & R are true but R is not the correct explanation of A . A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A . A is false but R is true. Both A & R are true and R is the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In C the keywords are also called Character words Special words Reserved words Class words Character words Special words Reserved words Class words ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor differentiates between op code, data/address at any time by the stack pointer the sequence in which memory contents are fetched by it its internal registers the program counter the stack pointer the sequence in which memory contents are fetched by it its internal registers the program counter ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Neither A nor B Either A or B External buffer is used Processor is capable of waiting Neither A nor B Either A or B External buffer is used Processor is capable of waiting ANSWER DOWNLOAD EXAMIANS APP
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