Microprocessor If m is a power of 2, the number of select lines required for an m-input mux is: 2^m 2*m m log2 (m) 2^m 2*m m log2 (m) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. B-C D-E Stack Pointer PSW B-C D-E Stack Pointer PSW ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (I), (II) & (III) (II) only (I) only (II) & (III) (I), (II) & (III) (II) only (I) only (II) & (III) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following? Instruction cycle Machine cycle Clock cycle Memory cycle Instruction cycle Machine cycle Clock cycle Memory cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. PSW Stack Pointer B-C D-E PSW Stack Pointer B-C D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) Execution Unit (EU) None of these Both ‘b’ and ‘c’ Bus Interface Unit (BIU) Execution Unit (EU) None of these Both ‘b’ and ‘c’ ANSWER DOWNLOAD EXAMIANS APP
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