Digital Electronics Why small bubble is given on the output of the NAND gate symbol ? Output is inverted None of these Open collector output Tristate Output is inverted None of these Open collector output Tristate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A half adder has 2 inputs and 2 output 1 input and 1 output 2 inputs and 1 outputs 1 input and 2 outputs 2 inputs and 2 output 1 input and 1 output 2 inputs and 1 outputs 1 input and 2 outputs ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics What logic function is produced by adding an inverter to each input and output of an OR gate? NOR NAND X-OR AND NOR NAND X-OR AND ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The terms which cannot be combined further in the tabular method are called prime implicants selective prime implicants essential prime implicants implicants prime implicants selective prime implicants essential prime implicants implicants ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In case of OR gate, no matter what the number of inputs, a 1 at any input causes the output to be at logic 1 0 at any input causes the output to be at logic 1. 1 at any input causes the output to be at logic 0 0 any input causes the output to be at logic 0 1 at any input causes the output to be at logic 1 0 at any input causes the output to be at logic 1. 1 at any input causes the output to be at logic 0 0 any input causes the output to be at logic 0 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics When will be the output of an AND gate is LOW ? When all inputs are HIGH When any input is LOW When any input is HIGH When all input is LOW When all inputs are HIGH When any input is LOW When any input is HIGH When all input is LOW ANSWER DOWNLOAD EXAMIANS APP
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