Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using DeMorgan’s Theorem we can convert any AND-OR structure into OR-NAND NOR-NAND NAND-NOR NAND-NAND OR-NAND NOR-NAND NAND-NOR NAND-NAND ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a fixed OR array is called a PLA PROM PLD PAL PLA PROM PLD PAL ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Register pair used to indicate memory B and C H and L D and E W and Z B and C H and L D and E W and Z ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 002CH 0000H 0034H 003CH 002CH 0000H 0034H 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following? Memory cycle Instruction cycle Machine cycle Clock cycle Memory cycle Instruction cycle Machine cycle Clock cycle ANSWER DOWNLOAD EXAMIANS APP
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