Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) same as the content of A7-A0 irrelevant all bits set (i.e. FFH) all bits reset (i.e. 00H) same as the content of A7-A0 irrelevant all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) & (III) (II) only (I), (II) & (III) (I) only (II) & (III) (II) only (I), (II) & (III) (I) only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is negated, S is asserted R is asserted, S is asserted R is negated, S is negated R is asserted, S is negated R is negated, S is asserted R is asserted, S is asserted R is negated, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack pointer register in a microprocessor keeps the address of the next instruction to be fetched counts the number of instructions being executing on the microprocessor holds the address of the top of the stack counts the number of programs being executing on the microprocessor keeps the address of the next instruction to be fetched counts the number of instructions being executing on the microprocessor holds the address of the top of the stack counts the number of programs being executing on the microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are affected indicating specific conditions not affected always reset always set affected indicating specific conditions not affected always reset always set ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Inintel 8085A microprocessor ALE signal is made high to To latch data D0-D7 from data bus Enable the data bus to be used as low order address bus To disable data bus To achieve all the functions listed above To latch data D0-D7 from data bus Enable the data bus to be used as low order address bus To disable data bus To achieve all the functions listed above ANSWER DOWNLOAD EXAMIANS APP
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