Digital Electronics The AND-OR realization of a combinational circuit requires three 3-input AND gates and one 3-input OR gate. This circuit can be designed using None of these three 3-input NAND gates and one 3-input NOR gate three 3-input OR gates and one 3-input AND gate four input NAND gates only None of these three 3-input NAND gates and one 3-input NOR gate three 3-input OR gates and one 3-input AND gate four input NAND gates only ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A system has following negative numbers stored in binary form as shown. The wrongly stored number is -89 as 10100111 -48 as 11101000 -37 as 11011011 -32 as 11100000 -89 as 10100111 -48 as 11101000 -37 as 11011011 -32 as 11100000 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The logic expression AB can be implemented by giving the inputs A and B to a two-input NAND gate X-NOR gate NOR gate X-OR gate NAND gate X-NOR gate NOR gate X-OR gate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Slowest memory element is RAM Hard Drive Cache ROM RAM Hard Drive Cache ROM ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins? PLCC QFP BGA PGA PLCC QFP BGA PGA ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A 15-bit Hamming code requires 4 parity bits none of these. 5 parity bits 15 parity bits 4 parity bits none of these. 5 parity bits 15 parity bits ANSWER DOWNLOAD EXAMIANS APP
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