Microprocessor The addressing mode in instruction PUSH B is direct register indirect register immediate direct register indirect register immediate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of status flags present in 8085 microprocessor are 10 8 16 5 10 8 16 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The character set of Fortran 77 includes lower case alphabets a to z. False True False True ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The execution of RST n instruction causes the stack pointer to increment by two decrement by two remain unaffected None of these increment by two decrement by two remain unaffected None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Complements Can not change Clears Sets Complements Can not change Clears Sets ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS