Microprocessor The 8085 microprocessor enters into bus idle machine cycle whenever DAD RP instruction is executed RST 7.5 is recognized None of these INTR interrupt is recognized DAD RP instruction is executed RST 7.5 is recognized None of these INTR interrupt is recognized ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a microprocessor based system the stack is always in ROM EPROM RAM microprocessor ROM EPROM RAM microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is negated R is asserted, S is negated R is negated, S is asserted R is asserted, S is asserted R is negated, S is negated R is asserted, S is negated R is negated, S is asserted R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the data transfer is not possible in microprocessor memory to accumulator accumulator to memory I/O device to accumulator memory to memory memory to accumulator accumulator to memory I/O device to accumulator memory to memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T1 OP code fetch T3 OP code fetch T2 OP code fetch T4 OP code fetch T1 OP code fetch T3 OP code fetch T2 OP code fetch T4 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Each instruction in an assembly language program has the following fields 1. Label field 2. Mnemonic field 3. Operand field 4. Comment field What are the correct sequence of these fields? 1, 3, 2 and 4 2, 1, 4 and 3 1, 2, 3 and 4 2, 4, 1 and 3 1, 3, 2 and 4 2, 1, 4 and 3 1, 2, 3 and 4 2, 4, 1 and 3 ANSWER DOWNLOAD EXAMIANS APP
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