Digital Electronics OR operation is equivalant to Intersection Both B and C Division Union Intersection Both B and C Division Union ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The maximum positive and negative numbers which can be represented in two’s complement form using n bits are respectively, +2n-1,-2n-1 +(2n-1-1),-2n-1 +2n-1,-(2n-1+1) +(2n-1-1),-(2n-1-1) +2n-1,-2n-1 +(2n-1-1),-2n-1 +2n-1,-(2n-1+1) +(2n-1-1),-(2n-1-1) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which one of the following even parity codes are in errors. (I)100110010 (II)011101010 (III)10111111010001010 Both (I)&(III) Both (II)&(III) Only (II) Only (III) Both (I)&(III) Both (II)&(III) Only (II) Only (III) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In ULSI, the number of gate circuits per chip is > 50,000 50,000 to 99,999 1,00,000 to 10,00,000 > 1,00,000 > 50,000 50,000 to 99,999 1,00,000 to 10,00,000 > 1,00,000 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A bubbled AND gate is equivalent to a X-OR gate NAND gate NOR gate OR gate X-OR gate NAND gate NOR gate OR gate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The Quine– McClusky method of minimization of a logic expression is a (i) graphical method (ii) algebraic method (iii) tabular method (iv) a computer-oriented algorithm The correct answers are (iii) and (iv) (ii) and (iv) (i) and (ii) (i) and (iii) (iii) and (iv) (ii) and (iv) (i) and (ii) (i) and (iii) ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS