Digital Electronics NOT gates are to be added to the inputs of which gate to convert it to a NOR gate? NAND AND OR X-NOR NAND AND OR X-NOR ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Consider the representation of six-bit numbers by two’s complement, one’s complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000? Sign and magnitude and one’s complement only Two’s complement only All three representations Two’s complement and one’s complement only Sign and magnitude and one’s complement only Two’s complement only All three representations Two’s complement and one’s complement only ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which one of the following even parity codes are in errors. (I)100110010 (II)011101010 (III)10111111010001010 Only (II) Only (III) Both (II)&(III) Both (I)&(III) Only (II) Only (III) Both (II)&(III) Both (I)&(III) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The AND-OR realization of a combinational circuit requires three 3-input AND gates and one 3-input OR gate. This circuit can be designed using three 3-input NAND gates and one 3-input NOR gate four input NAND gates only three 3-input OR gates and one 3-input AND gate None of these three 3-input NAND gates and one 3-input NOR gate four input NAND gates only three 3-input OR gates and one 3-input AND gate None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The NOR-NOR realization is equivalent to OR-AND realization NOT-AND realization OR-NOT realization AND-OR realization OR-AND realization NOT-AND realization OR-NOT realization AND-OR realization ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The Quine– McClusky method of minimization of a logic expression is a (i) graphical method (ii) algebraic method (iii) tabular method (iv) a computer-oriented algorithm The correct answers are (iii) and (iv) (ii) and (iv) (i) and (iii) (i) and (ii) (iii) and (iv) (ii) and (iv) (i) and (iii) (i) and (ii) ANSWER DOWNLOAD EXAMIANS APP
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