Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 01000000 00000100 010001000 11000100 01000000 00000100 010001000 11000100 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Gate Mux Register Decoder Gate Mux Register Decoder ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits set (i.e. FFH) irrelevant all bits reset (i.e. 00H) same as the content of A7-A0 all bits set (i.e. FFH) irrelevant all bits reset (i.e. 00H) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always A memory write cycle A memory read cycle A fetch cycle An I/O read cycle A memory write cycle A memory read cycle A fetch cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is used to access 16-bit data in 8086? Pipeline architecture. Memory Banking. Data Banking. None of these Pipeline architecture. Memory Banking. Data Banking. None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following statements for intel 8085 is correct? PC specifies the address of the instruction being executed PC specifies the address of the instruction to be executed PC specifies the number of instructions executed so far Program Counter (PC) specifies the address of the instruction last executed PC specifies the address of the instruction being executed PC specifies the address of the instruction to be executed PC specifies the number of instructions executed so far Program Counter (PC) specifies the address of the instruction last executed ANSWER DOWNLOAD EXAMIANS APP
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