Microprocessor In order to complement the lower nibble of accumulator one can use ORI 0FH ANI 0FH XRI 0FH CMA ORI 0FH ANI 0FH XRI 0FH CMA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system DMA refers to direct memory access for the user None of these direct memory access for the I/O device direct memory access for microprocessor direct memory access for the user None of these direct memory access for the I/O device direct memory access for microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PSW stands for accumulator and flag register contents flag byte none accumulator contents accumulator and flag register contents flag byte none accumulator contents ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache memory and I/O devices Two I/O devices Main memory and I/O devices Cache and main memory Cache memory and I/O devices Two I/O devices Main memory and I/O devices Cache and main memory ANSWER DOWNLOAD EXAMIANS APP
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