Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 4 2, 3, 5 1, 3, 5 1, 2, 5 1, 3, 4 2, 3, 5 1, 3, 5 1, 2, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits set (i.e. FFH) all bits reset (i.e. 00H) irrelevant same as the content of A7-A0 all bits set (i.e. FFH) all bits reset (i.e. 00H) irrelevant ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following instruction is not possible in 8085? POP B POP PSW POP 30 H POP D POP B POP PSW POP 30 H POP D ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When an 8085 microprocessor is reset, the address bus contains 0043H 003CH 0000H 002CH 0043H 003CH 0000H 002CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. RIM SIM DI EI RIM SIM DI EI ANSWER DOWNLOAD EXAMIANS APP
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