Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Doubles Halves Increases by 2^(address bits)/addressability Remains unchanged Doubles Halves Increases by 2^(address bits)/addressability Remains unchanged ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 3, 4 1, 2, 5 2, 3, 5 1, 3, 5 1, 3, 4 1, 2, 5 2, 3, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The reason for the presence of ALE pin in 8085, but not in 6800 is that 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O None 8085 has 5 interrupts lines, whereas 6800 has only two 8085 has multiplexed bus, whereas 6800 does not have 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O None 8085 has 5 interrupts lines, whereas 6800 has only two 8085 has multiplexed bus, whereas 6800 does not have ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLA PAL PLD PROM PLA PAL PLD PROM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the non-programmable interfacing device from the following 8257. 8255. 8295. 8212. 8257. 8255. 8295. 8212. ANSWER DOWNLOAD EXAMIANS APP
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