Microprocessor Identify the non-maskable interrupt from the following RST 4.5 RST 5.5 RST 6.5 RST 7.5 RST 4.5 RST 5.5 RST 6.5 RST 7.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The instruction set of a microprocessor cannot be changed by the user is specified by the user is stored inside the microprocessor is specified by the manufacturers cannot be changed by the user is specified by the user is stored inside the microprocessor is specified by the manufacturers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any mask able interrupt the microprocessor can be interrupted by a non-mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any interrupt the microprocessor cannot be interrupted by any mask able interrupt the microprocessor can be interrupted by a non-mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any interrupt ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The multiplexing of address bus and data buses is used in none of these. all the microprocessors. depends on the internal architecture. never multiplexed. none of these. all the microprocessors. depends on the internal architecture. never multiplexed. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following pair of gates can form a latch? A pair of cross coupled OR A pair of cross coupled NAND A cross coupled NAND/OR A pair of cross copled AND A pair of cross coupled OR A pair of cross coupled NAND A cross coupled NAND/OR A pair of cross copled AND ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. ANSWER DOWNLOAD EXAMIANS APP
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