Microprocessor An I/O processor controls the flow of information between Cache memory and I/O devices Cache and main memory Two I/O devices Main memory and I/O devices Cache memory and I/O devices Cache and main memory Two I/O devices Main memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of hardware interrupts present in 8085 microprocessor are 10 16 5 8 10 16 5 8 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? D-E. Program Counter. H-L. Stack Pointer. D-E. Program Counter. H-L. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor S0 and S1 pins are used for None of these acknowledging the interrupt serial communication indicating the processor’s status None of these acknowledging the interrupt serial communication indicating the processor’s status ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLD PROM PLA PAL PLD PROM PLA PAL ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of status flags present in 8085 microprocessor are 8 16 10 5 8 16 10 5 ANSWER DOWNLOAD EXAMIANS APP
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