Microprocessor An I/O processor controls the flow of information between Cache memory and I/O devices Cache and main memory Main memory and I/O devices Two I/O devices Cache memory and I/O devices Cache and main memory Main memory and I/O devices Two I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Length of the instruction POP D is 3 byte 1 byte 2 byte 4 byte 3 byte 1 byte 2 byte 4 byte ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Remains unchanged Doubles Increases by 2^(address bits)/addressability Halves Remains unchanged Doubles Increases by 2^(address bits)/addressability Halves ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data bus of any microprocessor is always Unidirectional None Either unidirectional or bi-directional Bi-directional Unidirectional None Either unidirectional or bi-directional Bi-directional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following I) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flag. Which one of the above flags is/are present in 8085 microprocessor? (I) only (II) & (III) (I) ,(III) & (IV) (I) & (II) (I) only (II) & (III) (I) ,(III) & (IV) (I) & (II) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Inintel 8085A microprocessor ALE signal is made high to Enable the data bus to be used as low order address bus To disable data bus To latch data D0-D7 from data bus To achieve all the functions listed above Enable the data bus to be used as low order address bus To disable data bus To latch data D0-D7 from data bus To achieve all the functions listed above ANSWER DOWNLOAD EXAMIANS APP
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