Digital Electronics A latch is ________ sensitive level both level and edge edge None level both level and edge edge None ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of the following is known as a mod-2 adder? NAND gate X-OR gate X-NOR gate NOR gate NAND gate X-OR gate X-NOR gate NOR gate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In flip flop clock is present but in latch clock is present always. none. may be present/absent. absent always. present always. none. may be present/absent. absent always. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Statement(A): 2’s complement arithmetic is preferred in digital computers. Statement(R):The Hardware required to obtain the 2’s complement of a number is simple. A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view? Bi-directional I/O pin access Input operation All of these Tristate output operation Bi-directional I/O pin access Input operation All of these Tristate output operation ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of the following shows the correct attachment of even parity bit to the data 00001001? 000010010 100001001 000010011 000001001 000010010 100001001 000010011 000001001 ANSWER DOWNLOAD EXAMIANS APP
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