Microprocessor A combinational PLD with a fixed AND array and a programmable OR array is called a PLD PAL PROM PLA PLD PAL PROM PLA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA signal/signals in 8085 is/are All. HOLD. READY. HLDA. All. HOLD. READY. HLDA. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always A memory read cycle A memory write cycle An I/O read cycle A fetch cycle A memory read cycle A memory write cycle An I/O read cycle A fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. D-E Stack Pointer B-C PSW D-E Stack Pointer B-C PSW ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
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